Intel/Barefoot Network Asic with Optical I/O

Wed, Mar 11, 2020 - 455 Words - 3 minutes

On 5 March Intel announced that is successfully integrated its 1.6 Tbps silicon photonics engine with a 12.8 Tbps Barefoot Tofino 2 ASIC. This switch uses optical fiber to the front panel ports instead of the usual copper tracks on the PCB (Printed Circuit Board) to QSFP28 front panel cages.